The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Dec. 28, 2007
Applicants:

James W. Alexander, Hillsboro, OR (US);

Son H. Lam, Puyallup, WA (US);

Devadatta V. Bodas, Federal Way, WA (US);

Krishna Kant, Portland, OR (US);

Kai Cheng, Portland, OR (US);

Ian M. Steiner, Hillsboro, OR (US);

Gopikrishna Jandhyala, San Jose, CA (US);

Inventors:

James W. Alexander, Hillsboro, OR (US);

Son H. Lam, Puyallup, WA (US);

Devadatta V. Bodas, Federal Way, WA (US);

Krishna Kant, Portland, OR (US);

Kai Cheng, Portland, OR (US);

Ian M. Steiner, Hillsboro, OR (US);

Gopikrishna Jandhyala, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Embodiments of the invention are generally directed to systems, methods, and apparatuses for clock enable (CKE) coordination. In some embodiments, a memory controller includes logic to predict whether a scheduled request will be issued to a rank. The memory controller may also include logic to predict whether a scheduled request will not be issued to the rank. In some embodiments, the clock enable (CKE) is asserted or de-asserted to a rank based, at least in part, on the predictions. Other embodiments are described and claimed.


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