The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Nov. 08, 2011
Applicants:

Michael Anthony Zampaglione, San Jose, CA (US);

Michael Tooher, Mountain View, CA (US);

Inventors:

Michael Anthony Zampaglione, San Jose, CA (US);

Michael Tooher, Mountain View, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system are provided for maintaining a virtual ground node of an SRAM memory array at a minimum level sufficient for maintaining data retention. A circuit can maintain the virtual ground node at a virtual ground reference voltage of V−(1.5*V), or maintain 1.5*Vacross the memory cells, where Vis a threshold voltage of an SRAM memory cell transistor and Vis a positive supply voltage. By tracking the Vof the memory cell transistors in the SRAM array, the circuit reduces leakage current while maintaining data integrity. A threshold voltage reference circuit can include one or more memory cell transistors (in parallel), or a specially wired memory cell to track the memory cell transistor threshold voltage. The value of the virtual ground reference voltage can be based on a ratio of feedback chain elements in a multiplier circuit.


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