The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Feb. 17, 2011
Applicants:

Fang-shi Jordan Lai, Chia Yi, TW;

Chin-hao Chang, Hsin-Chu, TW;

Manoj M. Mhala, Hsin-Chu, TW;

Hsu-feng Hsueh, Tainan, TW;

Yung-fu Lin, Hsin-Chu, TW;

Cheng Yen Weng, Hsin-Chu, TW;

Inventors:

Fang-Shi Jordan Lai, Chia Yi, TW;

Chin-Hao Chang, Hsin-Chu, TW;

Manoj M. Mhala, Hsin-Chu, TW;

Hsu-Feng Hsueh, Tainan, TW;

Yung-Fu Lin, Hsin-Chu, TW;

Cheng Yen Weng, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An analog-to-digital (ADC) calibration apparatus comprises a calibration buffer, a comparator and a digital calibration block. Each reference voltage is sent to a track-and-hold amplifier as well as the calibration buffer. The comparator compares the output from the track-and-hold amplifier and the output from the calibration buffer and generates a binary number. Based upon a successive approximation method, the digital calibration block finds a correction voltage for ADC offset and nonlinearity compensation. By employing the ADC calibration apparatus, each reference voltage can be calibrated and the corresponding correction voltage can be used to modify the reference voltage during an ADC process.


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