The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Jul. 28, 2010
Applicants:

Chih-chin Liao, Changhua, TW;

Cheeman Yu, Madison, WI (US);

Ya Huei Lee, Luzhou, TW;

Inventors:

Chih-Chin Liao, Changhua, TW;

Cheeman Yu, Madison, WI (US);

Ya Huei Lee, Luzhou, TW;

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package.


Find Patent Forward Citations

Liao, Chih-Chin. (2013). Semiconductor device with die stack arrangement including staggered die and efficient wire bonding (U.S. Patent No. 8415808). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8415808

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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