The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Nov. 11, 2009
Applicants:

Wang Jian Ping, Shanghai, CN;

Chin Chang Liao, Shanghai, CN;

Waisum Wong, Shanghai, CN;

Inventors:

Wang Jian Ping, Shanghai, CN;

Chin Chang Liao, Shanghai, CN;

Waisum Wong, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

System and method for test structure on a wafer. According to an embodiment, the present invention provides a test structure for testing a chip. For example, the test structure and the chip are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment. The test structure includes a top structure positioned above the chip. For example, the top structure can be characterized by a first surface area. The top structure includes a first metal material occupying less than 60% of the surface area. The test structure also includes a bottom structure positioned below the chip. For example, the bottom structure can be characterized by a second surface area. The second surface area is substantially equal to the first surface area. The bottom structure includes a first silicon material. The first silicon material occupies substantially all of the second surface area.


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