The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2013
Filed:
Jan. 14, 2011
MI Sun Hwang, Gyunggi-do, KR;
Keung Jin Sohn, Gyunggi-do, KR;
Eung Suek Lee, Seoul, KR;
Myung Sam Kang, Gyunggi-do, KR;
Mi Sun Hwang, Gyunggi-do, KR;
Keung Jin Sohn, Gyunggi-do, KR;
Eung Suek Lee, Seoul, KR;
Myung Sam Kang, Gyunggi-do, KR;
Samsung Electro-Mechanics Co., Ltd., Suwon, Gyunggi-do, KR;
Abstract
Disclosed herein is a method for manufacturing a semiconductor package which uses a base memberin which a first metal layer, a barrier layer, and a second metal layerare stacked on both surface thereof in sequence based on an adhesive memberto simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chipto a printed circuit board through a solder bump, thereby making it possible to implement a high-density package substrate; and forms a metal postinstead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.