The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

May. 27, 2005
Applicants:

Dina H. Triyoso, Austin, TX (US);

Olubunmi O. Adetutu, Austin, TX (US);

Inventors:

Dina H. Triyoso, Austin, TX (US);

Olubunmi O. Adetutu, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C23F 1/00 (2006.01); H01L 21/461 (2006.01); H01L 21/302 (2006.01); B44C 1/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor process and apparatus includes forming first and second gate electrodes () by forming the first gate electrode () over a first high-k gate dielectric () and forming the second gate electrode () over at least a second high-k gate dielectric () different from the first gate dielectric (). Either or both of the high-k gate dielectric layers () may be formed by depositing and selectively etching an initial layer of high-k dielectric material (e.g.,). As deposited, the initial layer () has an exposed surface () and an initial predetermined crystalline structure. An exposed thin surface layer () of the initial layer () is prepared for etching by modifying the initial crystalline structure in the exposed thin surface layer. The modified crystalline structure in the exposed thin surface layer may be removed by applying a selective etch, such as HF or HCl.


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