The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2013

Filed:

Jul. 15, 2010
Applicants:

Prabal K. Bhattacharya, Cupertino, CA (US);

Timothy Martin O'leary, Cupertino, CA (US);

William Scott Cranston, Haverhill, MA (US);

Walter Hartong, Isen, DE;

Inventors:

Prabal K. Bhattacharya, Cupertino, CA (US);

Timothy Martin O'Leary, Cupertino, CA (US);

William Scott Cranston, Haverhill, MA (US);

Walter Hartong, Isen, DE;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and methods for simulating and verifying an analog mixed signal design provide an analog mixed signal testbench configured to verify analog parameters of the design. The testbench can include a mechanism to fetch a value of an analog object in an analog portion of a mixed signal design. The testbench mechanism can include an argument specifying the name of the object and the analog quantity to be fetched for that object. The testbench can retrieve estimated values and can further specify timing constraints specifying absolute times or events at which values are to be measured and returned.


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