The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2013
Filed:
Jan. 16, 2009
Applicants:
Tadashi Nakamura, Osaka, JP;
Fumio Echigo, Osaka, JP;
Masaaki Katsumata, Osaka, JP;
Inventors:
Assignee:
Panasonic Corporation, Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A multilayer printed wiring board () is composed of a plurality of printed wiring boards (and) each having wiring on its both sides, and a relaxing connection layer () for interconnecting the printed wiring boards (and). The relaxing connection layer () contains an inorganic filler, a thermosetting resin, and a reliever for relieving internal stress. The multilayer printed wiring board () is prevented from warpage by making the relaxing connection layer () disposed inside it absorb internal stress caused by heating and cooling in a solder reflow process or other processes.