The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Oct. 09, 2009
Applicants:

LI Zhao, Beaverton, OR (US);

Ravishankar Iyer, Portland, OR (US);

Rameshkumar G. Illikkal, Portland, OR (US);

Erik G. Hallnor, Beaverton, OR (US);

Martin G. Dixon, Portland, OR (US);

Donald K. Newell, Portland, OR (US);

Inventors:

Li Zhao, Beaverton, OR (US);

Ravishankar Iyer, Portland, OR (US);

Rameshkumar G. Illikkal, Portland, OR (US);

Erik G. Hallnor, Beaverton, OR (US);

Martin G. Dixon, Portland, OR (US);

Donald K. Newell, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, method, and system are disclosed. In one embodiment the apparatus includes a cache memory, which a number of sets. Each of the sets in the cache memory have several cache lines. The apparatus also includes at least one process resource table. The process resource table maintains a cache line occupancy count of a number of cache lines. Specifically, the cache line occupancy count for each cache line describes the number of cache lines in the cache storing information utilized by a process running on a computer system. Additionally, the process resource table stores the occupancy count of less cache lines than the total number of cache lines in the cache memory.


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