The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Jun. 09, 2011
Harry Chuang, Hsinchu, TW;
Kong-beng Thei, Pao-Shan Village, TW;
Su-chen Lai, Hsinchu, TW;
Gary Shen, Yonghe, TW;
Harry Chuang, Hsinchu, TW;
Kong-Beng Thei, Pao-Shan Village, TW;
Su-Chen Lai, Hsinchu, TW;
Gary Shen, Yonghe, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for fabricating a semiconductor device is provided which includes providing a semiconductor substrate, forming a plurality of transistors, each transistor having a dummy gate structure, forming a contact etch stop layer (CESL) over the substrate including the dummy gate structures, forming a first dielectric layer to fill in a portion of each region between adjacent dummy gate structures, forming a chemical mechanical polishing (CMP) stop layer over the CESL and first dielectric layer, forming a second dielectric layer over the CMP stop layer, performing a CMP on the second dielectric layer that substantially stops at the CMP stop layer, and performing an overpolishing to expose the dummy gate structure.