The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2013

Filed:

Nov. 12, 2010
Applicants:

Tsun-lai Hsu, Hsinchu Hsien, TW;

Jui-fang Chen, Taichung County, TW;

Jun-hong Ou, Taipei, TW;

Ji-wei Hsu, Taipei County, TW;

Inventors:

Tsun-Lai Hsu, Hsinchu Hsien, TW;

Jui-Fang Chen, Taichung County, TW;

Jun-Hong Ou, Taipei, TW;

Ji-Wei Hsu, Taipei County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing a layout of a device in an integrated circuit before actually fabricated is provided. The method includes inputting at least one fixed parameter for the device for fabrication. And then, a first part of a set of variable parameters of a layout of the device is input. The complete set of the variable parameters is generated. It is checked whether or not the layout with the parameters is satisfying a requirement, wherein an end step is reached if the layout is accepted by the requirement, and a new part of the set of variable parameters as the first part being looping in the foregoing steps if the layout is not accepted by the requirement.


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