The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2013
Filed:
Jun. 28, 2011
Kumar Ganapathy, Mountain View, CA (US);
Ruban Kanapathippillai, Dublin, CA (US);
Saurin Shah, Sunnyvale, CA (US);
George Moussa, Sunnyvale, CA (US);
Earle F. Philhower, Iii, Union City, CA (US);
Ruchir Shah, Mountain View, CA (US);
Kumar Ganapathy, Mountain View, CA (US);
Ruban Kanapathippillai, Dublin, CA (US);
Saurin Shah, Sunnyvale, CA (US);
George Moussa, Sunnyvale, CA (US);
Earle F. Philhower, III, Union City, CA (US);
Ruchir Shah, Mountain View, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A distributed direct memory access (DMA) method, apparatus, and system is provided within a system on chip (SOC). DMA controller units are distributed to various functional modules desiring direct memory access. The functional modules interface to a systems bus over which the direct memory access occurs. A global buffer memory, to which the direct memory access is desired, is coupled to the system bus. Bus arbitrators are utilized to arbitrate which functional modules have access to the system bus to perform the direct memory access. Once a functional module is selected by the bus arbitrator to have access to the system bus, it can establish a DMA routine with the global buffer memory.