The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2013

Filed:

Jan. 14, 2011
Applicants:

William B. Andrews, Macungie, PA (US);

Zheng Chen, Upper Macungie, PA (US);

Inventors:

William B. Andrews, Macungie, PA (US);

Zheng Chen, Upper Macungie, PA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment of the invention, a programmable logic device, such as an FPGA, has programmable I/O circuits that can be programmed into any one of a number of different operating modes before configuration is completed. As such, the same set of I/O circuits and corresponding I/O pads can be used to configure the device using different configuration interfaces having different interface signaling requirements. Such a device may be able to be implemented using fewer I/O pads than conventional devices that employ a different set of I/O pads for each different type of configuration interface supported by the device.


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