The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2013
Filed:
Jan. 10, 2011
Stefanos Sidiropoulos, Palo Alto, CA (US);
Shwetabh Verma, Mountain View, CA (US);
Shahriar Rabii, Palo Alto, CA (US);
Stefanos Sidiropoulos, Palo Alto, CA (US);
Shwetabh Verma, Mountain View, CA (US);
Shahriar Rabii, Palo Alto, CA (US);
NetLogic Microsystems, Inc., Mountain View, CA (US);
Abstract
A method and system to drive large off-chip loads, such as, for example, laser diodes, wherein the system includes an integrated circuit coupled to an external differential diode load. Alternatively, the external diode load may be driven single-ended. The integrated circuit includes a data buffer device and a clock buffer device. The integrated circuit also includes a multiplexer device coupled to the clock buffer device configured to multiplex a data input signal and a clock input signal received at respective inputs of the integrated circuit. If the external diode is single-ended, the data input signal is transmitted to the data buffer device, which is then used solely to drive the diode load. If the diode load is differential, the data buffer device receives the data input signal. At the same time, the multiplexer device receives both the data input signal and the clock input signal and selects the data signal to drive the clock buffer device. For a diode load being driven differentially, the outputs of the two buffer devices are merged together externally through the use of a power-combining network, which includes external or off-chip transmission lines, which carry a respective output signal for the data buffer device and the clock buffer device.