The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2013
Filed:
Mar. 26, 2010
Satoru Ide, Annaka, JP;
Moriyuki Kashiwa, Annaka, JP;
Kazuo Kobayashi, Annaka, JP;
Noriyuki Motimaru, Annaka, JP;
Eiichi Yamamoto, Annaka, JP;
Tomio Kubo, Annaka, JP;
Hiroaki Kida, Yokohama, JP;
Satoru Ide, Annaka, JP;
Moriyuki Kashiwa, Annaka, JP;
Kazuo Kobayashi, Annaka, JP;
Noriyuki Motimaru, Annaka, JP;
Eiichi Yamamoto, Annaka, JP;
Tomio Kubo, Annaka, JP;
Hiroaki Kida, Yokohama, JP;
Okamoto Machine Tool Works, Ltd., Annaka, JP;
Abstract
A planarization apparatus and method that thins and planarizes a substrate by grinding and polishing the rear surface of the substrate with high throughput, and that fabricates a semiconductor substrate with reduced adhered contaminants. A planarization apparatus that houses various mechanism elements in semiconductor substrate loading/unloading stage chamber, a rear-surface polishing stage chamber, and a rear-surface grinding stage chamber. The throughput time of the rear-surface polishing stage that simultaneously polishes two substrates is typically about double the throughput time of the rear-surface grinding stage that grinds one substrate.