The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2013
Filed:
Dec. 02, 2010
Charles J. Alpert, Austin, TX (US);
Joachim G. Clabes, Austin, TX (US);
Zhuo LI, Austin, TX (US);
Tuhin Mahmud, Austin, TX (US);
Stephen T. Quay, Austin, TX (US);
Charles J. Alpert, Austin, TX (US);
Joachim G. Clabes, Austin, TX (US);
Zhuo Li, Austin, TX (US);
Tuhin Mahmud, Austin, TX (US);
Stephen T. Quay, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A mechanism is provided for resolving uplift or coupling timing problems and slew violations without sacrificing late mode timing in integrated circuit (IC) designs. Responsive to a request being received to generate a new IC design, for each net in a plurality of nets in the new IC design, a determination is made as to whether the net is routable through a cell in a plurality of cells using a cost function associated with the cell such that a coupling capacitance associated with the net is equal to or below a predetermined coupling capacitance threshold. Responsive to net being able to be routed through the cell with the coupling capacitance being equal to or below the threshold, the net is assigned to at least one track within the cell. Responsive to all nets in the new IC design being routed, a new IC design is generated.