The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8363503 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 29, 2013

Filed:

May. 10, 2010
Applicants:

Takenori Sato, Chuo-ku, JP;

Hiroki Fujisawa, Chou-ku, JP;

Inventors:

Takenori Sato, Chuo-ku, JP;

Hiroki Fujisawa, Chou-ku, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To include a power-down control circuit that suspends an operation of a predetermined internal circuit in response to a power-down command, and an external terminal to which a selection signal is input from outside simultaneously with issuance of a power-down command. The power-down control circuit suspends an operation of a DLL circuit when the selection signal is at a low level, and continues an operation of the DLL circuit when the selection signal is at a high level. According to the present invention, by using the selection signal input simultaneously with a power-down command, mode selection can be made on-the-fly.


Find Patent Forward Citations

Sato, Takenori. (2013). Semiconductor memory device, memory controller that controls the same, and information processing system (U.S. Patent No. 8363503). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8363503

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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