The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2013

Filed:

May. 03, 2012
Applicants:

Vassili Kireev, Sunnyvale, CA (US);

Parag Upadhyaya, San Jose, CA (US);

Mark J. Marlett, Livermore, CA (US);

Inventors:

Vassili Kireev, Sunnyvale, CA (US);

Parag Upadhyaya, San Jose, CA (US);

Mark J. Marlett, Livermore, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01F 27/29 (2006.01); H01F 5/00 (2006.01); H01F 27/28 (2006.01); H01F 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A symmetrical inductor includes an integrated circuit having a plurality of conductive layers. A first loop is disposed in an upper layer of the conductive layers, and at least two strapped loops are disposed in at least two layers of the conductive layers, respectively. The strapped loops are coupled in series to the first loop, and the at least two layers are below the upper layer. A second loop is disposed in the upper layer and is coupled in series to the at least two strapped loops. A first terminal electrode is coupled to the first loop, and a second terminal electrode is coupled to the second loop. A center-tap electrode is coupled to the at least two strapped loops.


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