The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 2013

Filed:

Aug. 13, 2010
Applicants:

Stephen W. Bedell, Wappingers Falls, NY (US);

Jee H. Kim, Los Angeles, CA (US);

Siegfried L. Maurer, Stormville, NY (US);

Alexander Reznicek, Mount Kisco, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Inventors:

Stephen W. Bedell, Wappingers Falls, NY (US);

Jee H. Kim, Los Angeles, CA (US);

Siegfried L. Maurer, Stormville, NY (US);

Alexander Reznicek, Mount Kisco, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A p-type field effect transistor (PFET) having a compressively stressed channel and an n-type field effect transistor (NFET) having a tensilely stressed channel are formed. In one embodiment, a silicon-germanium alloy is employed as a device layer, and the source and drain regions of the PFET are formed employing embedded germanium-containing regions, and source and drain regions of the NFET are formed employing embedded silicon-containing regions. In another embodiment, a germanium layer is employed as a device layer, and the source and drain regions of the PFET are formed by implanting a Group IIIA element having an atomic radius greater than the atomic radius of germanium into portions of the germanium layer, and source and drain regions of the NFET are formed employing embedded silicon-germanium alloy regions. The compressive stress and the tensile stress enhance the mobility of charge carriers in the PFET and the NFET, respectively.


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