The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2013
Filed:
Aug. 17, 2007
Applicants:
Gordon M. Grivna, Mesa, AZ (US);
Francine Y. Robb, Fountain Hills, AZ (US);
Inventors:
Gordon M. Grivna, Mesa, AZ (US);
Francine Y. Robb, Fountain Hills, AZ (US);
Assignee:
Semiconductor Components Industries, LLC, Phoenix, AZ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract
In one embodiment, an MOS transistor is formed with trench gates. The gate structure of the trench gates generally has a first insulator that has a first thickness in one region of the gate and a second thickness in a second region of the gate.
Quick Actions:
Grivna, Gordon. (2013). Method of forming an mos transistor and structure therefor (U.S. Patent No. 8350318). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8350318
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