The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2013
Filed:
Dec. 19, 2008
Alexander Andreev, San Jose, CA (US);
Vojislav Vukovie, Santa Clara, CA (US);
Igor Vikhliantsev, San Jose, CA (US);
Alexander Andreev, San Jose, CA (US);
Vojislav Vukovie, Santa Clara, CA (US);
Igor Vikhliantsev, San Jose, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A parity unit circuit for use in a parallel, pipelined, low density parity check (LDPC) decoder that implements an iterative, min-sum, message passing LDPC algorithm. The parity unit provides a memory logic block for storing information relating to a current and next iteration of the LDPC computations and includes a 'compute' logic block for computing a parity message (with sign) for application to related bit nodes and a 'compute' logic block for updating the data stored in the memory logic block for a next iteration of the LDPC decoder.