The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2013

Filed:

Sep. 28, 2010
Applicant:

Atsushi Nakakubo, Yokohama, JP;

Inventor:

Atsushi Nakakubo, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A booster circuit includes a first capacitor and a second capacitor serially coupled between a first node and a second node through a third node; a third capacitor and a fourth capacitor serially coupled between a fourth node and a fifth node through a sixth node; a first switch coupling the third node with a power supply line when the fourth node is set to a first level; a second switch coupling the sixth node with the power supply line when the first node is set to the first level; a third switch transferring a plurality of electric charges of the sixth node to the second node; a fourth switch transferring a plurality of electric charges of the third node to the fifth node; a fifth switch coupling the second node with a voltage line; and a sixth switch coupling the fifth node with the voltage line.


Find Patent Forward Citations

Nakakubo, Atsushi. (2013). Booster circuit and semiconductor memory (U.S. Patent No. 8345503). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8345503

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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