The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2012
Filed:
Sep. 30, 2008
Karl J. Duvalsaint, Lagrangeville, NY (US);
Harm P. Hofstee, Austin, TX (US);
Daeik Kim, Beacon, NY (US);
Moon J. Kim, Wappingers Falls, NY (US);
Karl J. Duvalsaint, Lagrangeville, NY (US);
Harm P. Hofstee, Austin, TX (US);
Daeik Kim, Beacon, NY (US);
Moon J. Kim, Wappingers Falls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
This disclosure describes an apparatus, computer architecture, method, operating system, compiler, and application program products for MPEs as well as virtualization across physical boundaries that define physical partitions in a symmetric MCP. Among other things, the disclosure is applied to a generic microprocessor architecture with a set (e.g., one or more) of controlling/main processing elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). The arrangement also enables MPEs to delegate functionality to one or more groups of SPEs such that those group(s) of SPEs may act as pseudo MPEs. Such delegation may occur across the physical boundaries. Regardless, the pseudo MPEs may utilize pseudo virtualized control threads to control the behavior of other groups of SPEs also across physical boundaries.