The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Jan. 21, 2011
Applicants:

Jumpei Maruyama, Saitama, JP;

Sadao Yoshikawa, Yoro-gun, JP;

Inventors:

Jumpei Maruyama, Saitama, JP;

Sadao Yoshikawa, Yoro-gun, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

This invention offers a semiconductor memory device, with which a resolution to read-out data is not reduced even at the time of verify and a stable read-out operation is possible even when a power supply voltage is reduced. A read-out circuit is provided with a current-voltage conversion circuit, that converts a cell current into a data voltage, and a sense amplifier that compares the data voltage with a reference voltage. The current-voltage conversion circuit is formed to include a variable load resistor that is connected to the memory cell through a bit line. The variable load resistor is formed to include P channel type MOS transistors that make load resistors and P channel type MOS transistors that constitute a switching circuit.


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