The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2012
Filed:
Mar. 26, 2008
Dharmaray M. Nedalgi, Bangalore, IN;
Dharmaray M. Nedalgi, Bangalore, IN;
Synopsys, Inc., Mountain View, CA (US);
Abstract
An electronic device is provided with a high-voltage tolerant circuit. The high-voltage tolerant circuit comprises an input terminal for receiving an input signal (V), a first node (A) and a second node (B), wherein the second node (B) is coupled to an input of a receiver (R). The high-voltage tolerant circuit furthermore comprises a first NMOS transistor (N) and a first PMOS transistor (P) coupled in parallel between the input terminal and the second node(B). Furthermore, a second PMOS transistor (P) is coupled between the input terminal and node A and a second NMOS transistor is coupled with one of its terminals to the first node. The gate of the first NMOS transistor (N) is coupled to a supply voltage (VDDE). The gate of the first PMOS transistor (P) is coupled to the first node (A). The gate of the second NMOS transistor (N) and the gate of the second PMOS transistor (P) are coupled to the supply voltage (VDDE).