The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2012

Filed:

Sep. 29, 2009
Applicants:

Toshiya Uemura, Aichi, JP;

Masanobu Ando, Aichi, JP;

Tomoharu Shiraki, Aichi, JP;

Masahiro Ohashi, Aichi, JP;

Naoki Arazoe, Aichi, JP;

Ryohei Inazawa, Aichi, JP;

Inventors:

Toshiya Uemura, Aichi, JP;

Masanobu Ando, Aichi, JP;

Tomoharu Shiraki, Aichi, JP;

Masahiro Ohashi, Aichi, JP;

Naoki Arazoe, Aichi, JP;

Ryohei Inazawa, Aichi, JP;

Assignee:

Toyoda Gosei Co., Ltd., Nishikasugai-Gun, Aichi-Ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/30 (2006.01); H01L 21/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other. Next, the epitaxial layer is divided into each chip by separating the epitaxial growth substrate by laser lift-off, and then removing the epitaxial layer serving as the outer periphery of each chip. Next, the outer peripheral side surface of the epitaxial layer of each chip is at least completely covered with an insulating protective film. Next, the supporting substrate is separated into each chip.


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