The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Mar. 07, 2011
Applicant:

Partha Gajapathy, Highland Village, TX (US);

Inventor:

Partha Gajapathy, Highland Village, TX (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Apparatus and methods are disclosed, such as those involving array/port consolidation and/or swapping. One such apparatus includes a plurality of port pads including a plurality of contacts; a plurality of memory arrays; and a plurality of master data lines. Each of the master data lines extends in a space between one of the port pads and a respective one of the memory arrays. Each of the master data lines is electrically connectable to the contacts of a respective one of the port pads. The apparatus further includes a plurality of local data lines, each of which extends over a respective one of the memory arrays. Each of the local data lines is electrically connectable to a respective one of the master data lines. At least one of the local data lines extends over at least two of the memory arrays. This configuration allows memory array consolidation and/or swapping without increasing die space for additional routing and adversely affecting performance of the apparatus.


Find Patent Forward Citations

Loading…