The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Jul. 01, 2010
Applicant:

John Mccollum, Saratoga, CA (US);

Inventor:

John McCollum, Saratoga, CA (US);

Assignee:

Actel Corporation, Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory cell includes a non-volatile p-channel transistor having a source coupled to a first potential, a drain, and a gate. A non-volatile n-channel transistor has a source coupled to a second potential, a drain, and a gate. A switch transistor has a gate coupled to a switch node, a source, and a drain. A stress transistor has a source and drain coupled between the drain of the non-volatile p-channel transistor and the drain of the non-volatile n-channel transistor, the stress transistor having a gate coupled to a gate bias circuit. Where one of the first or second potentials is a bit line, an isolation transistor is coupled between the other of the second potentials and one of the non-volatile transistors.


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