The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Mar. 30, 2011
Applicants:

Wei Han, Hillsboro, OR (US);

Barry Britton, Hillsboro, OR (US);

Eric Lee, Hillsboro, OR (US);

Zheng Chen, Hillsboro, OR (US);

Warren Juenemann, Hillsboro, OR (US);

Mose Wahlstrom, Hillsboro, OR (US);

Inventors:

Wei Han, Hillsboro, OR (US);

Barry Britton, Hillsboro, OR (US);

Eric Lee, Hillsboro, OR (US);

Zheng Chen, Hillsboro, OR (US);

Warren Juenemann, Hillsboro, OR (US);

Mose Wahlstrom, Hillsboro, OR (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A programmable logic device (PLD) is disclosed that includes a non-volatile memory; a shadow register; and a data shift register (DSR) configurable to receive control information from an external programming tool, wherein the DSR is configured to shift the control information into the shadow register if the PLD is in a first programming mode, the PLD being configurable to operate in the first programming mode using the control information stored in the shadow register without the control information being stored in the non-volatile memory.


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