The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2012

Filed:

Feb. 11, 2010
Applicants:

Ping Ting Wang, Shanghai, CN;

Cheng Yang, Shanghai, CN;

Seung Hyuk Lee, Shanghai, CN;

Jin Gang Wu, Shanghai, CN;

Inventors:

Ping Ting Wang, Shanghai, CN;

Cheng Yang, Shanghai, CN;

Seung Hyuk Lee, Shanghai, CN;

Jin Gang Wu, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/72 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for making contact landing pad structures in a semiconductor integrated circuit device includes forming an isolation region and forming active regions in the semiconductor substrate. The active regions are separated by the isolation region, and each of the active regions includes one or more contact regions. The method includes forming a raised structure overlying the isolation region and disposed between a first and second contact regions. The method includes depositing a cap layer and forming an interlayer dielectric layer overlying the cap layer. The method includes depositing a photoresist layer overlying the interlayer dielectric layer and uses a mask pattern to selectively remove a portion of the photoresist layer to form a line type opening, which exposes a portion of the interlayer dielectric layer overlying at least the first and second contact regions. The method deposits a conductive fill material and performs a planarization process to form multiple conductive landing contact pads.


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