The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2012
Filed:
Apr. 14, 2009
Vladimir Okhmatovski, Winnipeg, CA;
Mengtao Yuan, Santa Clara, CA (US);
Rodney Phelps, Pittsburgh, PA (US);
Vladimir Okhmatovski, Winnipeg, CA;
Mengtao Yuan, Santa Clara, CA (US);
Rodney Phelps, Pittsburgh, PA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Systems and methods for modeling a multilayer integrated circuit include three-dimensional interconnect models in multilayered substrates for greater accuracy. Mesh models are used to resolve effects of nearby elements and grid models are used to resolve effects of far-away elements. Sidewall mesh elements of three-dimensional interconnects are projected onto parallel (or substantially parallel) grids between the top and bottom walls of the interconnects so that grid models can be used to resolve three-dimensional effects of interconnects in multilayered substrates.