The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2012
Filed:
Sep. 13, 2010
Keiji Mita, Isesaki, JP;
Yasuhiro Tamada, Ota, JP;
Masao Takahashi, Fukaya, JP;
Takao Maruyama, Ora-gun, JP;
Keiji Mita, Isesaki, JP;
Yasuhiro Tamada, Ota, JP;
Masao Takahashi, Fukaya, JP;
Takao Maruyama, Ora-gun, JP;
Sanyo Semiconductor Co., Ltd., Gunma, JP;
Sanyo Semiconductor Manufacturing Co., Ltd., Ojiya-shi, JP;
Semiconductor Components Industries, LLC, Phoenix, unknown;
Abstract
A serially-connected diode pair made of diodes having a high withstand voltage and a low on-resistance is formed based on a high withstand voltage vertical PNP bipolar transistor process technology. Two of the diode pairs are connected in parallel to form a bridge so that there is formed a high-efficiency full-wave rectifier circuit that is free from a leakage current due to a parasitic transistor. The serially-connected diode pair is formed by connecting a diode composed of a P type semiconductor substrate, that makes an anode, and an N type buried layer, that makes a cathode, and a diode composed of a P+ type conductive layer, that makes an anode, and an N type epitaxial layer, that makes a cathode, in series with an electrode AC. An N+ type buried layer and an N+ type conductive layer are formed to prevent an electric potential at the N+ type buried layer from becoming lower than an electric potential at a P+ type buried layer even when a large positive voltage is applied to the electrode AC, so as to prevent a parasitic PNP transistor composed of the P+ type buried layer, the N+ type buried layer and the P type semiconductor substrate, that make an emitter, a base and a collector, respectively, from turning on.