The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
Jun. 23, 2009
Brian Lee, Cambridge, MA (US);
Srinivas Doddi, Fremont, CA (US);
Ron Pyke, Bellevue, WA (US);
Taber Smith, Saratoga, CA (US);
Emmanuel Drege, Los Gatos, CA (US);
Brian Lee, Cambridge, MA (US);
Srinivas Doddi, Fremont, CA (US);
Ron Pyke, Bellevue, WA (US);
Taber Smith, Saratoga, CA (US);
Emmanuel Drege, Los Gatos, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Disclosed are a method, a system, and a computer program product for implementing hotspot detection, repair, and optimization of an electronic circuit design, which, in some embodiments, defines, identifies criteria for hotspots/metrics or optimization objective function; performs the initial hotspot or metric prediction; identifies correction candidate(s); applies a correction candidate to the electronic circuit design; and determines whether the outcome of applying the correction candidate is acceptable. The method or the system identifies custom correction candidate(s) or custom command(s) and identifies one or more hints for the predicted hotspots or metrics; provides a single architecture to use a first model for hotspot identification/correction and a second model for design check; and provides the capability to apply a correction for a hotspot or metric, evaluate the effectiveness of the correction on the fly, and revert any changes made to the electronic circuit design by the correction.