The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
Feb. 11, 2009
Joseph R. Greco, South Burlington, VT (US);
Kevin Munger, Fairfax, VT (US);
Richard A. Phelps, Colchester, VT (US);
Jennifer C. Robbins, Richmond, VT (US);
William Savaria, Colchester, VT (US);
James A. Slinkman, Montpelier, VT (US);
Randy L. Wolf, Essex Junction, VT (US);
Joseph R. Greco, South Burlington, VT (US);
Kevin Munger, Fairfax, VT (US);
Richard A. Phelps, Colchester, VT (US);
Jennifer C. Robbins, Richmond, VT (US);
William Savaria, Colchester, VT (US);
James A. Slinkman, Montpelier, VT (US);
Randy L. Wolf, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.