The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2012

Filed:

Mar. 06, 2011
Applicants:

Zvi Or-bach, San Jose, CA (US);

Deepak C. Sekar, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Paul Lim, San Jose, CA (US);

Inventors:

Zvi Or-Bach, San Jose, CA (US);

Deepak C. Sekar, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Paul Lim, San Jose, CA (US);

Assignee:

Monolithic 3D Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method to fabricate a junction-less transistor comprising: forming at least two regions of semiconductor doping; first region with a relatively high level of dopant concentration and second region with at least 1/10 lower dopant concentration, and etching away a portion of said first region for the formation of the transistor gate.


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