The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2012
Filed:
Feb. 25, 2011
Applicants:
Peter Baars, Dresden, DE;
Marco Lepper, Dresden, DE;
Clemens Fitz, Dresden, DE;
Inventors:
Assignee:
GLOBALFOUNDRIES, Inc., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract
Methods are provided for fabricating a CMOS integrated circuit having a dual stress layer without NiSi hole formation. One method includes depositing a tensile stress layer overlying a semiconductor substrate. A portion of the tensile stress layer is removed, leaving a remaining portion, before applying a curing radiation. A curing radiation is then applied to the remaining portion; and a compressive stress layer is deposited overlying the semiconductor substrate and the remaining portion.