The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2012

Filed:

Feb. 07, 2008
Applicants:

Walter Lee, Framingham, MA (US);

Robert A. Gottlieb, Westford, MA (US);

Vineet Soni, Union City, CA (US);

Anant Agarwal, Weston, MA (US);

Richard Schooler, Cambridge, MA (US);

Inventors:

Walter Lee, Framingham, MA (US);

Robert A. Gottlieb, Westford, MA (US);

Vineet Soni, Union City, CA (US);

Anant Agarwal, Weston, MA (US);

Richard Schooler, Cambridge, MA (US);

Assignee:

Tilera Corporation, Westborough, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises receiving subsets of instructions corresponding to different portions of a program, each subset assigned to one of the computation units; scheduling instructions in a given subset for execution on the assigned computation unit, including scheduling communication instructions that send to or receive from a different computation unit over the interconnection network; allocating registers in a given computation unit for storing values accessed by instructions in a subset assigned to the given computation unit; and scheduling instructions after allocating registers to account for spills of values stored in allocated register to memory, preserving the order of communication instructions scheduled before allocating registers.


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