The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2012

Filed:

Jun. 22, 2007
Applicants:

Samuel J. Tower, Austin, TX (US);

Matthew S. Berzins, Cedar Park, TX (US);

Charles A. Cornell, Austin, TX (US);

Inventors:

Samuel J. Tower, Austin, TX (US);

Matthew S. Berzins, Cedar Park, TX (US);

Charles A. Cornell, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A flip-flop includes a functional latch and a retention latch. The functional latch is configured to maintain a logic state of the flip-flop in a power-up mode and the retention latch is configured to maintain the logic state of the flip-flop in a power-down mode. The retention latch is selectively coupled to the functional latch and the retention latch is configured to maintain the logic state in the power-down mode irrespective of a level of an associated clock signal when the power-down mode is entered. A clock pulse that clocks the flip-flop is derived from the associated clock signal.


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