The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2012
Filed:
Nov. 10, 2010
Applicant:
Benjamin S. Ting, Saratoga, CA (US);
Inventor:
Benjamin S. Ting, Saratoga, CA (US);
Assignee:
Actel Corporation, Mountain View, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
Abstract
An architecture of hierarchical interconnect scheme for field programmable gate arrays (FPGAs).
Quick Actions:
Ting, Benjamin. (2012). Architecture and interconnect scheme for programmable logic circuits (U.S. Patent No. 8289047). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8289047
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile