The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8289040 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 16, 2012

Filed:

Nov. 16, 2010
Applicants:

Yoshio Komoto, Gunma, JP;

Yoshiharu Umemura, Kanagawa, JP;

Shinichi Hamaguchi, Kanagawa, JP;

Yasushi Kawaguchi, Saitama, JP;

Inventors:

Yoshio Komoto, Gunma, JP;

Yoshiharu Umemura, Kanagawa, JP;

Shinichi Hamaguchi, Kanagawa, JP;

Yasushi Kawaguchi, Saitama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A wafer unit for testing is electrically connected to a plurality of chips to be tested formed on a wafer to be tested, the wafer unit for testing including: a connecting wafer provided to face the wafer to be tested, and to be electrically connected to each of the plurality of chips to be tested; and a temperature distribution adjusting section provided on the connecting wafer, and to adjust a temperature distribution of the wafer to be tested.


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Komoto, Yoshio. (2012). Test wafer unit and test system (U.S. Patent No. 8289040). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8289040

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