The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2012

Filed:

May. 13, 2010
Applicants:

Chad A. Adams, Byron, MN (US);

George M. Braceras, Essex Junction, VT (US);

Daniel M Nelson, Rochester, MN (US);

Harold Pilo, Underhill, VT (US);

Vinod Ramadurai, South Burlington, VT (US);

Inventors:

Chad A. Adams, Byron, MN (US);

George M. Braceras, Essex Junction, VT (US);

Daniel M Nelson, Rochester, MN (US);

Harold Pilo, Underhill, VT (US);

Vinod Ramadurai, South Burlington, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A reduced bitline precharge level has been found to increase the SRAM Beta ratio, thus improving the stability margin. The precharge level is also supplied to Sense amplifier, write driver, and source voltages for control signals. In the sense amplifier, the lower precharge voltage compensates for performance loss in the bit-cell by operating global data-line drivers with increased overdrive. In the write driver, the reduced voltage improves the Bitline discharge rate, improves the efficiency of the negative boost write assist, and decreases the reliability exposure of transistors in the write path from negative boost circuit.


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