The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2012

Filed:

Dec. 22, 2009
Applicants:

Ren Wang, Portland, OR (US);

Sanjay Rungta, Phoenix, AZ (US);

Tsung-yuan Tai, Portland, OR (US);

Chih-fan Hsin, Portland, OR (US);

Jr-shian Tsai, Hillsboro, OR (US);

Inventors:

Ren Wang, Portland, OR (US);

Sanjay Rungta, Phoenix, AZ (US);

Tsung-Yuan Tai, Portland, OR (US);

Chih-Fan Hsin, Portland, OR (US);

Jr-Shian Tsai, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and systems to balance the load among a set of processing units, such as servers, in a manner that allows the servers periods of low power consumption. This allows energy efficient operation of the set of processing units. Moreover, the process is adaptable to variations in systemic response times, so that systemic response times may be improved when operational conditions so dictate.


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