The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2012

Filed:

Feb. 08, 2008
Applicants:

Sandeep Khanna, Los Altos, CA (US);

Maheshwaran Srinivasan, Santa Clara, CA (US);

DE Cai LI, Fremont, CA (US);

Chetan Deshpande, San Jose, CA (US);

Inventors:

Sandeep Khanna, Los Altos, CA (US);

Maheshwaran Srinivasan, Santa Clara, CA (US);

De Cai Li, Fremont, CA (US);

Chetan Deshpande, San Jose, CA (US);

Assignee:

NetLogic Microsystems, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/59 (2006.01); G05F 1/618 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.


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