The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2012
Filed:
Feb. 15, 2011
Yoshimichi Harada, Kanagawa, JP;
Masami Suzuki, Tokyo, JP;
Yoshihiro Nabe, Tokyo, JP;
Yuji Takaoka, Kanagawa, JP;
Tatsuo Suemasu, Shizuoka, JP;
Hideyuki Wada, Chiba, JP;
Masanobu Saruta, Chiba, JP;
Yoshimichi Harada, Kanagawa, JP;
Masami Suzuki, Tokyo, JP;
Yoshihiro Nabe, Tokyo, JP;
Yuji Takaoka, Kanagawa, JP;
Tatsuo Suemasu, Shizuoka, JP;
Hideyuki Wada, Chiba, JP;
Masanobu Saruta, Chiba, JP;
Sony Corporation, Tokyo, JP;
Fujikura Ltd., Tokyo, JP;
Abstract
A method for manufacturing a semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. Another insulating layer is formed in the via hole, and a conductive layer of the through-hole interconnection is subsequently formed. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.