The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2012
Filed:
Mar. 18, 2011
Albert Ratnakumar, San Jose, CA (US);
Qi Xiang, San Jose, CA (US);
Simardeep Maangat, San Jose, CA (US);
Jun Liu, Milpitas, CA (US);
Albert Ratnakumar, San Jose, CA (US);
Qi Xiang, San Jose, CA (US);
Simardeep Maangat, San Jose, CA (US);
Jun Liu, Milpitas, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A low-voltage reference circuit may have a pair of semiconductor devices. Each semiconductor device may have an n-type semiconductor region, an n+ region in the n-type semiconductor region, a metal gate, and a gate insulator interposed between the metal gate and the n-type semiconductor region through which carriers tunnel. The metal gate may have a work function matching that of p-type polysilicon. The gate insulator may have a thickness of less than about 25 angstroms. The metal gate may form a first terminal for the semiconductor device and the n+ region and n-type semiconductor region may form a second terminal for the semiconductor device. The second terminals may be coupled to ground. A biasing circuit may use the first terminals to supply different currents to the semiconductor devices and may provide a corresponding reference output voltage at a value that is less than one volt.