The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2012

Filed:

Mar. 03, 2010
Applicants:

Chia Ching LI, Lujhou, TW;

Hsin Yi Ho, Hsinchu, TW;

Chun Hsiung Hung, Hsinchu, TW;

Inventors:

Chia Ching Li, Lujhou, TW;

Hsin Yi Ho, Hsinchu, TW;

Chun Hsiung Hung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/096 (2006.01); H03K 5/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a circuit for generating a clock signal. The circuit comprises a current source to generate a reference current and provide a first voltage V, a first current generator to generate a first mirror current during a first half cycle based on the reference current, a first capacitor including a first end, and a first transistor having a first threshold voltage V. The first transistor includes a gate to receive the first voltage V, a drain coupled to the first current generator and a source coupled to the first end of the first capacitor so as to allow the first mirror current to charge the first capacitor during the first half cycle, wherein the period of the first half cycle is a function of the first bias voltage Vminus the first threshold voltage V.


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