The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2012

Filed:

May. 27, 2009
Applicants:

Jong-in Yun, Seoul, KR;

Soon-moon Jung, Gyeonggi-do, KR;

Han-soo Kim, Gyeonggi-do, KR;

Hoo-sung Cho, Gyeonggi-do, KR;

Jun-beom Park, Seoul, KR;

Jae-hun Jeong, Gyeonggi-do, KR;

Inventors:

Jong-In Yun, Seoul, KR;

Soon-Moon Jung, Gyeonggi-do, KR;

Han-Soo Kim, Gyeonggi-do, KR;

Hoo-Sung Cho, Gyeonggi-do, KR;

Jun-Beom Park, Seoul, KR;

Jae-Hun Jeong, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

One embodiment exemplarily described herein can be generally characterized as a semiconductor device that includes a lower level device layer located over a semiconductor substrate, an interlayer insulating film located over the lower level device layer and an upper level device layer located over the interlayer insulating film. The lower level device layer may include a plurality of devices formed in the substrate. The upper level device layer may include a plurality of semiconductor patterns and at least one device formed in each of the plurality of semiconductor patterns. The plurality of semiconductor patterns may be electrically isolated from each other. Each of the plurality of semiconductor patterns may include at least one active portion and at least one body contact portion electrically connected to the at least one active portion.


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