The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2012

Filed:

Jan. 16, 2009
Applicants:

Palkesh Jain, Bangalore, IN;

Arvind Nembili Veeravalli, Bangalore, IN;

Ajoy Mandal, Bangalore, IN;

Inventors:

Palkesh Jain, Bangalore, IN;

Arvind Nembili Veeravalli, Bangalore, IN;

Ajoy Mandal, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to an aspect of the present invention, statistical timing analysis is applied with respect to a stress degradation that occurs in fabricated integrated circuits (IC) when used for a long duration. The circuit design may be suitably modified to account for the degradations (e.g., those caused by NBTI and CHC for transistors, those caused due to electromigration in case of interconnects). As a result, the fabricated ICs may be less susceptible to such degradations. The features are extended to model complex circuit blocks and also account for different degrees of stress that different circuit blocks are subjected to, in a same age of operation.


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