The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2012

Filed:

Jan. 19, 2010
Applicants:

George P. Lippincott, Lake Oswego, OR (US);

Sergly M. Komirenko, Cupertino, CA (US);

Inventors:

George P. Lippincott, Lake Oswego, OR (US);

Sergly M. Komirenko, Cupertino, CA (US);

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for generating a pair of layouts suitable for forming exposure mask to use in a double dipole lithographic process are disclosed. With some implementations, a y-dipole layout and an x-dipole layout are generated by decomposing a target layout. Subsequently, an optical proximity correction process is implemented on the y-dipole layout and the x-dipole layout. The decomposition may designate ones of the edge segments in the target layout at major edge segments and other ones of the edge segments as minor edge segments. A higher feedback value may then be assigned to the minor edges than the major edges. Subsequently, a few iterations of an optical proximity correction process that utilizes a smaller than intended mask rule constraint value and the assigned feedback values is implemented on the target layout. The minor edges separated by a distance of less than the intended mask rule constraint distance are then collapsed. After which, a few iterations of the optical proximity correction process are allowed to iterate. In further implementations, once the y-dipole and x-dipole layouts have been generated. An additional optical proximity correction process is implemented on the layouts. During this optical proximity correction process, a higher feedback values is again assigned to the minor edge segments. At a point during the optical proximity correction process, minor edges within portions of the layouts that have a bias value larger than a predetermined value are expanded back from their collapsed position.


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